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Academician of Chinese Science Academy, senior
member of IEEE, IEE Fellow, the standing member
of Chinese Institute of Electronics, associate
chief editor of Journal of Semiconductors and
Journal of Chinese Electronics, a member of Far
East programming committee, International Conference
on Solid-State Circuits (ISSCC).
 Under
his directorship，the first three-type 1k MOS DRAM
(poly-Si gate and N channel，poly-Si gate and P
channel，A1 gate and N channel) was developed in
China in the mid 1970S．He proposed a stress-enhanced
oxidation model of polysilicon film to explain
the oxidation characteristics, project application
equation and pointed out the relationship of doping
concentration with carrier mobility，which provides
a scientific prediction for the oxidation condition
and doping concentration of poly-Si films．In the
1980s he investigated the stress distribution
in the polyside and salicide structure of sub-micron
ICs．He has proposed a floating一body model of SOI
devices, extended the SPICE Simulating software
for the SOI IC design and developed new SOI device
structures．He and co-workers put forward a new
analytical model for polysilicon emitter bipolar
transistors and gave a better explanation of their
physical properties as well as their temperature
characteristics in the 1990s．Recently, he is searching
sub-0.1μm device, IC technology and MEMS.
Up to now, Prof. Wang has published
6 books and more than 160 academic papers, and
has obtained 5 patents. He was awarded 16 items
of the national and ministry awards. He once won
National invention Awards, the first class Advanced
Science and Technology Awards by the State Education
Committee, the National Science Conference Awards
and the first class of Guanghua Science and Technology
Foundation Awards due to his great contributions
to Chinese microelectronics.
Copyright
by [the Department
of Microelectronics, Peking University]
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